Most LVDS drivers support up to a 95MHz input clock (some newer ones up to 105MHz). The input data is then serialized and is output at a rate of 7x the clock. This means that for every input clock, 7 bits of data would be transmitted per channel.
Diagram of LVDS Driver Outputs for 8-bit JETDA Colour Format
Since there is a restriction on how fast the drivers can be clocked, achieving 148.5MHz (1080p, 60Hz, 8-bit) can be done be separating the odd and even pixels and sending the data separately using two drivers. Each driver would then effectively be transmitting at half the rate, or 74.25MHz.
The board consisted on a Silicon Image HDMI Receiver, two Thine LVDS transmitters, and an Atmel AVR microcontroller. The Silicon Image chip would convert decode the data and pass it along to the two Thine LVDS transmitters. The microcontroller was used to setup the turn-on sequence for the panel, and to program features in the Silicon Image chip using I2C. This board (and code for the microcontroller) was designed and assembled in four days in order to meet the trade show deadline.
Picture of the 1080p Raw Panel Driver Board
Pictures of the native 1080p panel being driven by the board
September 6th, 2007
hi, first of all i really like the simple and clean easy setup of the controller, may i ask if you would be so kind to give me the schematic, bom etc of your wonderful controller
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You're in luck :) This is the only personal project that I have fully documented. Send me an email (address at the top of this page) and I will send you the .zip file submission I used for the contest.
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